Calculating MIPS 2.0
نویسندگان
چکیده
منابع مشابه
MIPS-X: A 20-MIPS Peak, 32-bit Microprocessor with On-Chip Cache
MIPS-X is a 32-bit RISC microprocessor implemented in a conservative 2-p m, two-level-metal, n-well CMOS technology. High performance is achieved by using a nonoverlapping two-phase 20-MHz clock and executing one instruction every cycle. To reduce its memory bandwidth requirements, MIPS-X includes a 2-kbyte on-chip instruction cache. This cache satisfies 90 percent of all instruction fetches, a...
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ژورنال
عنوان ژورنال: Resources
سال: 2013
ISSN: 2079-9276
DOI: 10.3390/resources2040581